possessiones uber:
| EXEMPLUM | PERSEQUOR |
| genus | Integrated Circuit (IC) Embedded - FPGA (porta agri Programmabilis Forum) |
| manufacturer | Intel Xilinx |
| series | Artix-7 |
| sarcina | lance |
| productum status | in stirpe |
| Numerus LAB/CLB | 4075 |
| Numerus elementorum logicae / unitates | 52160 |
| Summa ram bits | 2764800 |
| I / O comitem | 106 |
| Voltage - Powered | 0.95V ~ 1.05V |
| genus institutionem | Superficiem Monte Type |
| Operating Temperature | 0°C ~ 85°C (TJ) |
| Sarcina / clausura | 238-LFBGA, CSPBGA |
| Supplementum Fabrica Packaging | 238-CSBGA (10x10) |
| Basic productum numerus | XC7A50 |
referre ugbay
Environment et Exportatio Classification:
| ATTRIBUTES | PERSEQUOR |
| RoHS status | Obsequium ROHS3 specificationem |
| Humorem Sensitivum Level (MSL) | III (CLXVIII horas) |
| SPATIUM status | Non products SPATIUM |
| ECCN | EAR99 |
| HTSUS | 8542.39.0001 |
DC Characteres
Artix‐7 FPGAs Data Sheet:
DC and AC Switching Characteres
DS181 (v1.27) Die 10 Februarii 2022
Product Specification
Mensam I: Absoluta Maximum Ratings (I)
Min Descriptio symboli Max Unitates
FPGA Logica
VCCINT
Internum supplere intentione -0.5 1.1 V
VCCAUX
Auxiliares copiae intentione -0.5 2.0 V
VCCBRAM
Supple intentione ad memoriam obstructionum ram -0.5 1.1 V
VCCO
Output coegi supplere intentione pro HR I/O ripis -0.5 3.6 V
VREF
Input reference voltage -0.5 2.0 V
VIN(2)(3)(4)
I/O input intentione -0.4 VCCO + 0.55 V
I/O input intentione (cum VCCO = 3.3V) pro VREF et differentiali I/O signa
nisi TMDS_33(5)
-0.4 2.625 V
VCCBATT
Key memoria altilium tergum copia -0.5 2.0 V
GTP Transceiver
VMGTAVCC
Analoga copia voltage pro transmissorum GTP et recipientium circuitus -0.5 1.1 V
VMGTAVTT
Analoga copia intentionum pro transmisso GTP et recipientis circuitus terminationes -0.5 1.32 V
VMGTREFCLK
Relatio horologii absoluti initus intentionis -0.5 1.32 V
Table II: Operating Conditions Commendatur (I) (II)
Descriptio symboli Min Typ Max Unitates
FPGA Logica
VCCINT(3)
Ad -3, -2, -2LE (1.0V), -1, -1Q, -1M strophas: internae copiae intentione 0.95 1.00 1.05 V
Pro -1LI (0.95V) strophas: internae copiae intentione 0.92 0.95 0.98 V
Pro -2LE (0.9V) strophas: internae copiae intentione 0.87 0.90 0.93 V
VCCAUX
V . 1.71 1.80 1.89 V
VCCBRAM(3)
Pro -3, -2, -2LE (1.0V), -2LE (0.9V), -1, -1Q, -1M strophas: ram copiae scandali
voltage
0.95 1.00 1.05 V
Pro -1LI (0.95V) strophas: clausus RAM copia voltage 0.92 0.95 0.98 V
VCCO(4)(5)
Supple intentione pro HR I/O ripis 1.14 - 3.465 V
VIN (6)
I/O input intentione -0.20 - VCCO + 0.20 V
I/O input intentione (cum VCCO = 3.3V) pro VREF et differentiali I/O signa
nisi TMDS_33 (7).
-0.20 - 2.625 V
IIN (8).
Maximum current per aliquem pin in a powered or unpowered bank when
deinceps bilinguis fibulae diode.
- - 10 mA
VCCBATT(9)
Pugna voltage 1.0 - 1.89 V
GTP Transceiver
VMGTAVCC(10)
Analoga copia intentionum pro circuitionibus GTP transmissoris et accipientis 0.97 1.0 1.03 V
VMGTAVTT(10)
Analoga copia intentionum pro transmissorum GTP et recipientium terminationum circuitus 1.17 1.2 1.23 V
