Proprietates uber:
| EXEMPLUM | PERSEQUOR |
| genus | Integrated circuit (IC) Embedded Systema in-chip (SoC) |
| manufacturer | Intel Xilinx |
| series | Zynq®-7000 |
| sarcina | lance |
| Product status | De sale |
| structure | MCU，FPGA |
| Core processus | Dual-core ARM® Cortex®-A9 MPCore™ with CoreSight™ |
| Flash memoriae magnitudine | - |
| RAM magnitudine | 256KB |
| periphericum fabrica | DMA |
| Connection facultatem | CANbus, EBI/EMI, Ethernet, IC, MMC/SD/SDIO, SPI, UART/USART, USB OTG |
| celeritas | 667MHz |
| Principalis attributa | Artix™-7 FPGA, 85K logica unitas |
| opus temperatus | -40°C ~ 100°C（TJ） |
| Sarcina / habitationi | 484-LFBGA，CSPBGA |
| Elit fabrica sarcina | 484-CSPBGA（19x19） |
| I / O numerum | 130 |
| Basic productum numerus | XC7Z020 |
Environment and export classification:
| TRIBUO | PERSEQUOR |
| RoHS status | Ad propinquos meos cum ROHS3 specificatione |
| Humor sensus gradu (MSL) | III (horis CLXVIII) |
| SPATIUM status | Non products SPATIUM |
| ECCN | 3A991D |
| HTSUS | 8542.39.0001 |
Zynq (VII) SoC Primum Generatio Architecture
Familia Zynq®-7000 in architectura Xilinx SoC fundatur.Haec producta integrant plumam duplicem nucleum vel unum cori ARM® Cortex™-A9 innixum systematis processus (PS) et 28 um Xilinx logicae programmabilis (PL) in una fabrica.ARM Cortex-A9 CPus sunt cor PS et etiam memoriam includunt, memoriam externam interfaciunt, et copiosa copia connectivitatis periphericae interfacies.Ratio processus (PS) ARM Cortex-A9 Substructio Processus Applicationis Uniti (APU) • 2.5 DMIPS/MHz per CPU • CPU frequentia: Usque ad 1 GHz • Multiprocessoris auxilium • ARMv7-A architectura • TrustZone® securitatis • Thumb®-2 instructio set • Jazelle® RCT supplicium Environment Architectura • NEON™ instrumentorum processus machinarum • Singulus et duplex praecisio Vector Floating Unit (VFPU) • CoreSight™ et Programma Trace Macrocell (PTM) • Timer et Interruptus • Tres vigiles timentes • Unus timor globalis • Duo calculi ter-times Caches • 32 KB Level 1 4 modus paro-consociativus instructio et cinematographica (independens pro sulum CPU) • 512 KB 8-via paro-associativa 2 cella (inter CPUs communicata) sustentatio pari-byte De-Chip Memoria • De caliga ROM • 256 KB on-chip RAM (OCM) • Byte-pari auxilio memoriae externae interfaces • Multiprotocollum memoriae dynamicae moderatoris • 16-bit vel 32-bit interfacies ad DDR3, DDR3L, DDR2, vel LPDDR2 memoriam • ECC subsidium in 16-bit modus • 1GB electronicae spatii utendi single rank of 8-, 16-, vel 32-bit-lates memoriae • Static memoria interfacies • 8-bit SRAM data bus cum usque ad 64 MB sustentationem • Parallel NOR fulmen fulcimentum • ONFI1.0 NAND fulmen fulcrum (1-bit ECC. )• 1-bit SPI, 2-bit SPI, 4-bit SPI (quad-SPI), vel duo quad-SPI (8-bit) vide nor mico 8-canale DMA Controller • Memoria-ad-memor, memori-to. peripherales, peripherales-ad memoriam, et transactionem subsidiorum I/O peripheralium colligentes et interfaces • duae 10/100/ 1000 tri-celeritates Aernetae MAC peripherales cum IEEE Std 802.3 et IEEE Std 1588 revisionem 2.0 subsidium • Disperge-congregare DMA facultas • Recognitio 1588 rev.2 PTP tabulae • GMII, RGMII, SGMII interfaciunt • Duo USB 2.0 OTG peripherales, singulae sustentantes usque ad 12 terminos • USB 2.0 fabrica IP nucleus obsecundans • subsidia in-imus, alta velocitate, plena velocitate et demissa. celeritatis modi • Intel EHCI obsequentis USB exercitus • 8-bit ULPI externum PHY interfacies • Duo plenae possunt 2.0B obsequere Can bus interfaces • POTEST 2.0-A et CAN 2.0-B et ISO 118981-1 vexillum obsequium • PHY externi interfaciei • Duo SD /SDIO 2.0/MMC3.31 moderatores obsequentes • Duplex SPI plenus-duplex portus cum tribus chipicis periphericis eligit • Duae summae celeritatis UARTs (usque ad 1 Mb/s) • Duo dominus et servus I2C interfaciunt • GPIO cum quattuor 32 bis ripis. , e quibus usque ad 54 frusta adhiberi possunt cum PS I/O (una ripa 32b et una ripa 22b) et usque ad 64 frusta (usque ad duas ripas 32b) cum programmabili Logica coniuncta • Usque ad 54 flexibilia. multiplex I/O (MIO) pro clavi periphericis destinationes interconnect • Excelsi sed connectivity inter PS et inter PS et PL • ARM AMBA® AXI subnixum • QoS subsidium criticael'eri for latency and band.
